This function simulates a lag or real-pole function in the discrete domain. The component is triggered by the 2-element, interpolated Enable/Disable port signal. The user has the ability to reset the output to a user-specified value at any executed instance. If the Reset signal is received between two execution steps, the output will be reset at the next execution step.
The solution method for this function is as follows:
Where,
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Output signal |
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Time at last execution |
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Time at execution, before the last execution |
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Input signal at last execution |
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Output generated at execution, before the last execution |
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Gain at last execution |
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Time constant at last execution |
More: |
Derivative with a Time Constant (Z-Domain) |
Name for Identification |
Text |
Optional text parameter for identification of the component. |
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Fortran Comment |
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Text |
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An optional Fortran comment. The text entered here is included in the project Fortran file |
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Limit Output? |
Choice |
Select Yes or No to enable or disable non-windup limits. |
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Resettable? |
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Choice |
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Select Never, Anytime or Timezero.
When to enable reset. If Anytime is selected, a port for the reset signal is enabled.
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Reset Value |
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Real |
Variable |
Value output upon reset action. |
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Is Input Already Sampled? |
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Choice |
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Select Yes if the input to the component is already executed at the same execution signal. If No is selected, the input will be re-sampled before execution. |
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Dimension |
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Integer |
Literal |
Enter the dimension of the input signal. The output will be of the same dimension. |
Gain |
Real |
Variable |
Gain factor. |
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Time Constant |
Real |
Variable |
Time constant [s]. |
Maximum Limit |
Real |
Variable |
Maximum limit of the real pole, visible only if Limit Output? | Yes is selected. |
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Minimum Limit |
Real |
Variable |
Minimum limit of the real pole, visible only if Limit Output? | Yes is selected. |
