The SVC component is a separate stand-alone Fortran subroutine. Consequently, features such as the variable time-step can readily be introduced without any impact on the main program. However, the information between those two is exchanged only at the end of an EMTDC time step, and within that time step each have to work with one time step old information about the other.
The figure below shows the SVC current IS(t) for one phase, calculated by the model for injection into EMTDC. A Norton resistance to ground RC is introduced in the model, as a special prevention measure, to avoid numerical instability at the interface due to open termination.
The value for RC is chosen to approximate the very short term behavior of the SVC. For example: RC = 2L/DELT where L is the zero-sequence inductance of the SVC transformer. The exact value chosen is not important because an extra current IC(t) is injected to compensate for any error introduced by RC.
